An Embedded Planar-Foil Capacitor Material, FPGA Based Interposer, Aimed at Improving System Performance and Reduce Board Size for Space Based Electronics
Don Hunter, Gary Bolotin, Malcolm Lias, Ben ChengAn Embedded Planar-Foil Capacitor Material FPGA Interposer Aimed at Improving System Performance and Reduce Board Size for Space Based Electronics.
This paper presents our work to date in developing, and testing embedded planar-foil capacitor based interposer meant to be used together with high density components such as Field Programmable Gate Arrays (FPGAs) and Application Specific Integrated Circuits (ASICs). These devices typically have a large number of I/O pins and power pins. The high speed enabled by these devices requires a large number of discrete bypass capacitors as close as possible to the power pins. These capacitors take up a considerable amount of the board area on the application circuit board. Our interposer replaces these components freeing up space of traditional bypass capacitors for other circuitry.
Our interposer was focused on the needs of Micro Semi’s RTG4. We developed the interposer using COTS embedded foil capacitors. We developed designs for Oak Mitsui, 3M and TDK foils. The three different designs were simulated using power distribution techniques, constructed and tested. Our simulations showed that our implementation of placing the capacitive foil based “Interposer” placed directly under the FPGA customized the capacitance to the FPGA banks, and resulted in improved horizontal and vertical interconnect inductances. The use of the interposer results in an overall reduction in our Printed Wiring Board (PWB) area.
This work was developed under NASA’s Europa Lander Technology Maturation Task entitled “Ultra Low Temperature Electronics” and ColdTech technology effort entitled “Cold Survivable Motor Controller” which is aimed at increasing science return by reducing the SWaP of motor control and avionics.